The post explains how accurate delay timers using NOT gates can be built easily with the help of ICs such as IC 4049 and generate reproducible delay features from these configurations.

There are several situations when a switching delay is necessary. One of the ways of accomplishing this is to utilize an RC network and an inverter (see figure 1). This is certainly pretty functional and apparent as there are frequently a few gates 'left over' within a circuit. Sadly, each electronic component includes a certain threshold and thus it is practically impossible to figure out the delay accurately ahead of time. However a considerable enhancement may be accomplished by hooking up a couple of inverter/ RC networks in series as demonstrated in figure 3. The minimal tolerance voltage of the inverter in figure 1 is 1 / 2 the supply voltage and possesses a tolerance of 30%. Figure 2 exhibits the signal input on the gate. lf this specific input is involving Uc =0.35 UD and Uc = 0.65 Ub the inverter may possibly ponder over it either logic 'O' or 'lā ! These voltages happen whenever a capacitor is charged via a resistor soon after an interval of 0.43 T and 1.057 correspondingly. (T is the time constant in the circuit and it is identical to R x C). The minimal tolerance voltage UC = 0.5 Ub is attained soon after this period of t = 0.69 T.

When the two inverters and RC networks of figure 3 are employed, each one RC network need to generate exactly the same delay, corresponding to half the overall value of figure 1. The entire delay are going to be 1/2 x 0.43 T+1/2 x 1.05 T=0.74 T in its most severe circumstance! This can be a great deal nearer to the minimal value of 0.69 T,

The foregoing must inform you the reason why the simple delay timer circuit of figure 4 offers this kind of persistently reproducible outcomes. On the other hand, to get truly acceptable operations, CMOS inverters should be used. This is because these types of gates possess a tolerance value of about 50 % the supply voltage. Additionally, their output are invariably either zero or the supply voltage. Schmitt triggers must not be applied! lf the delay periods utilizing 4000 series CMOS are normally found to be too prolonged the different 74HCXX series may be used. These are generally pin and function agreeable to the 74LSXX series and just simply as speedy!

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